市場調查報告書

ADAS/AD主晶片產業:2020年

ADAS/AD Master Chip Industry Report, 2020

出版商 ResearchInChina 商品編碼 968656
出版日期 內容資訊 英文 240 Pages
商品交期: 最快1-2個工作天內
價格
ADAS/AD主晶片產業:2020年 ADAS/AD Master Chip Industry Report, 2020
出版日期: 2020年10月12日內容資訊: 英文 240 Pages
簡介

向高度自動化的汽車邁進需要安裝大量的環境感測器和主晶片,以提供更強大的計算和算法。無論是FPGA/CPU/GPU還是ASIC,單一類型的汽車處理器都無法滿足高度自動化車輛的需求。SoC(主晶片)是CPU,GPU,NPU和ISP等計算元素的融合,這引起了市場競爭高關注。

本報告提供ADAS/AD主晶片產業調查分析,概要,趨勢,主要企業等相關的系統性資訊。

目錄

第1章 汽車半導體產業

  • 汽車半導體產業概要
  • 汽車用晶片趨勢
  • 汽車等級晶片的必要條件
  • 中國的晶片產業結構與汽車等級晶片的開發

第2章 ADAS/AD主晶片與趨勢

  • 汽車用ADAS/AD主晶片的分類
  • CPU,GPU,FPGA,ASIC
  • GPU的功能
  • FPGA的功能
  • ASIC的功能
  • 從ADAS/AD主晶片要求的計算能力
  • 全球ADAS/AD主晶片供應商與產品參數的比較
  • 中國的ADAS/AD主晶片供應商與產品參數的比較
  • Waymo的運算平台所採用的晶片
  • Apollo的運算平台所採用的晶片

第3章 全球ADAS/AD主晶片供應商

  • NXP
  • Intel/Mobileye
  • TI
  • Qualcomm
  • NVIDIA
  • Renesas
  • Xilinx
  • Tesla

第4章 中國的ADAS/AD主晶片供應商

  • Horizon Robotics
  • Huawei
  • Ambarella
  • Black Sesame Technologies
  • SemiDrive
  • Westwell Lab
目錄

ADAS/AD Master Chip Research: Weaknesses and Disruption in the Integration Trend

L2 vehicles are gaining ground as penetration is over 15%. A rash of L2.5 vehicle launches is drawing near. Mass production of L3 and L4 (limited scenarios) is also around the corner.

The march toward highly automated vehicles requires installation of a large number of environmental sensors, and master chips to offer ever stronger compute and algorithms.

Single type of automotive processors, whatever FPGA/CPU/GPU or ASIC, are not competent enough to meet the needs of highly automated vehicles. SoC (master chip), a fusion of computing elements like CPU, GPU, NPU and ISP, grows a great concern of the competitive market.

In the master chip field, vendors follow different technology roadmaps, and the mainstream solution is heterogeneous fusion of chips of differing types. CPU assumes logical operation and task scheduling; GPU as a universal accelerator undertakes tasks of neural network computing (e.g., CNN) and machine learning, and will work on computing for quite a long time; FPGA as hardware accelerator that is programmable and performs well in sequential machine learning (e.g., RNN/LSTM/reinforcement learning), plays a prominent role in some mature algorithms; ASIC, as fully customized solution with optimal performance and the least power consumption, will become the final option after automated driving algorithms get mature.

Mobileye started with conventional algorithms. EyeQ5 packs 4 modules: CPU, CVP (Computer Vision Processor), DLA (Deep Learning Accelerator) and MA. By size, CPU and CVP remain large. CPU has a big footprint; CVP acts as ASIC designed for a great many conventional computer vision algorithms. Mobileye is renowned for such common algorithms which are well received for low power consumption. DLA which was not written into the initial version of EyeQ5 brochure was added in just later under the market pressure as a small part of the entire chip.

Mobileye had the foresight to sell itself to Intel early for future integration with the chip giant's CPU and FPGA technology resources. As it is not open enough and its compute still desires to be much improved, EyeQ5 captures just few automaker users, only four (publicized), far less than NVIDIA Xavior.

We suppose that Mobileye has made arduous effort into solving the problem of openness. NXP and Renesas are also stepping up efforts to overcome weaknesses not only by improving API, tool chain and ecosystem but either buying in or acquiring related companies, for example, NXP invested Kalray and Renesas purchased IDT.

As aforementioned, Mobileye's algorithm solutions are still led by conventional computer vision algorithms and aided by deep learning algorithms, while its largest rival Nvidia focuses on deep learning algorithms.

Xavier has 4 modules: CPU, GPU, DLA (Deep Learning Accelerator) and PVA. GPU has the largest size, followed by CPU; and the two special ASICs play a subsidiary role: one is DLA for reasoning and the other is PVA for accelerating conventional computer vision algorithms.

At NVIDIA GTC 2019, NVIDIA unveiled NVIDIA DRIVE AP2X, a complete Level 2 + automated driving solution encompassing DRIVE AutoPilot software, DRIVE AGX and DRIVE validation tools. To enhance mapping and localization, DRIVE AP2X software will include MapNet, a DNN that identifies lanes and landmarks.

DRIVE AutoPilot homes in on maps and plans a safe, efficient path forward. Drive Works provides an extensive set of tools, reference applications, and documentation for developers. ClearSightNet is part of NVIDIA's camera-based obstacle perception software, which allows the vehicle to detect camera blindness in real time and performs DNN inference on a live camera feed, evaluating each frame to detect camera blindness.

Still, NVIDIA has a drawback -- high power consumption. Chips of Qualcomm and TI only need air cooling, while those of NVIDIA and Tesla need water cooling, which is a side effect of pursuing strong computing power.

It can be seen from the table above that another heavyweight is Xilinx that has won quite a few automotive clients as well on the strength of its unique FPGA (low power consumption, low latency, and excellent cost performance). Amid ADAS/AD master chips getting integrated, Xilinx does not reconcile itself to a minor role.

In 2018, Xilinx introduced Versal ACAP, a fully software-programmable, heterogeneous compute platform that combines Scalar Engines, Adaptable Engines, and Intelligent Engines. This shows Xilinx's ambition to transform from a specialist chip vendor into a computing platform provider.

Xilinx's products have evolved from FPGA to SoC (FPGA that has single hard-core processors on-chip) and MPSoC (FPGA that has multiple hard-core processors on-chip), then to RFSoC (RF-enabled MPSoC) and ACAP (adaptive compute acceleration platform).

In 2019, Xilinx announced Vitis, a unified software platform that makes it easier for developers to use FPGA. Vitis software platform supports heterogeneous system architectures such as Zynq SoC, MPSoC and Versal ACAP. It automatically tailors the Xilinx hardware architecture to the software or algorithmic code for developers without the need for hardware expertise.

Xilinx introducing Vitas and Versal, in a word, aims to gear from a FPGA vendor into a flexible, adaptive computing platform provider.

In the increasingly contested ADAS/AD master chip market, besides Mobileye, NVIDIA and Xilinx that have produced good results, the time-honored automotive chip vendors like NXP and Renesas are endeavoring to jump on the bandwagon. The giants Qualcomm and Huawei from the consumer electronics field make an aggressive foray into the market; Chinese start-ups Horizon Robotics, Black Sesame Technologies and SemiDrive which are availing themselves of the wave of replacing foreign products have brought in some gains.

As integration grows a trend, no one will survive without change. Anything will be possible in an unpredictable future.

Table of Contents

1 Automotive Semiconductor Industry

  • 1.1 Overview of Automotive Semiconductor Industry
    • 1.1.1 Classification of Automotive Semiconductors
    • 1.1.2 Classification of Automotive Semiconductors and Products
    • 1.1.3 Average Costs of Semiconductors in Autonomous Vehicle of Varied Level
    • 1.1.4 Forecast of the Demand for Various Sensors from Autonomous Vehicle (L2-L5)
    • 1.1.5 Value Growth of Intelligent Connected Vehicle (ICV) Chip
    • 1.1.6 Global Automotive Semiconductor Market Size and Structure
    • 1.1.7 Automotive Chip Types and Typical Vendors
    • 1.1.8 List of the Top 20 Automotive Semiconductor Vendors Worldwide
    • 1.1.9 Automotive Semiconductor Market Size by Systems
    • 1.1.10 Market Size of Automotive Chip Vendors Worldwide
    • 1.1.11 Market Size of Automotive Chip Vendors Worldwide (by Sector)
    • 1.1.12 Fields Where Automotive Chips Get Used Worldwide
    • 1.1.13 Automotive Chip Niche Market Size and Competition Pattern: MCU
    • 1.1.14 Automotive Chip Niche Market Size and Competition Pattern: Master Chip
    • 1.1.15 Automotive Chip Niche Market Size and Competition Pattern: Memory Chip
    • 1.1.16 Automotive Chip Niche Market Size and Competition Pattern: Communication Chip & Module
    • 1.1.17 Automotive Chip Niche Market Size and Competition Pattern: Power Chip
    • 1.1.18 Average Power Semiconductors Contained in the Differently Electrified New Energy Vehicle
  • 1.2 Automotive Chip Trends
  • 1.3 Requirements on Auto-grade Chip
    • 1.3.1 Basic Requirements for Auto-grade Chip
    • 1.3.2 Threshold for Access to Auto-grade Chip and Industry Barriers
    • 1.3.3 Elements for Auto-grade Chip Appraisal: Performance, Price and Power Consumption
    • 1.3.4 Automobile Supply Chain Standard System Criteria which Auto-grade Chips Have to Meet
  • 1.4 Chip Industry Structure and Auto-grade Chip Development in China
    • 1.4.1 Policy Climate for Automotive Chip Industry in China
    • 1.4.2 Hard Nuts to Crack for China Automotive Chip Industry
    • 1.4.3 Gaps between Automotive Chip Niche Markets and Rates of Self-sufficiency
    • 1.4.4 List of Automotive Chip Vendors and Corporate Types in China

2 ADAS/AD Master Chips and Trends

  • 2.1 Classification of Automotive ADAS/AD Master Chips
  • 2.2 CPU, GPU, FPGA and ASIC
  • 2.3 Features of GPU
  • 2.4 Features of FPGA
  • 2.5 Features of ASIC
  • 2.6 Compute Capability Asked by ADAS/AD Master Chip
  • 2.7 Global ADAS/AD Master Chip Vendors and Comparison between Product Parameters
  • 2.8 Chinese ADAS/AD Master Chip Vendors and Comparison between Product Parameters
  • 2.9 Chips Adopted by Waymo Computing Platform
  • 2.10 Chips Adopted by Apollo Computing Platform

3 Global ADAS/AD Master Chip Vendors

  • 3.1 NXP
    • 3.1.1 Operation of NXP
    • 3.1.2 Automotive Processors (Chips) of NXP
    • 3.1.3 NXP S32 Series
    • 3.1.4 Next-generation High-performance SoC of NXP
    • 3.1.5 NXP's Next-generation Processor Will Fuse with MPPA Smart Processor
    • 3.1.6 NXP's Launch of Service-oriented Gateway Chip S32G
    • 3.1.7 Key Properties and Chip Architecture of NXP S32G
    • 3.1.8 NXP S32 ADAS Chip
    • 3.1.9 Features of NXP S32 ADAS Chip Architecture
    • 3.1.10 NXP S32 ADAS Chip Technology Roadmap
    • 3.1.11 NXP Autonomous Driving Computing Platform -- Bluebox
    • 3.1.12 Bluebox Chip Composition and Properties
    • 3.1.13 Chip Composition of NXP's Next-generation BlueBox
    • 3.1.14 AI Deployment of NXP
    • 3.1.15 NXP's Collaborations on Automotive Chip
  • 3.2 Intel/Mobileye
    • 3.2.1 Autonomous Driving Division of Intel
    • 3.2.2 Automotive Master Chips of Intel
    • 3.2.3 Apollo Lake Platform of Intel
    • 3.2.4 Mobileye EyeQx Product Line
    • 3.2.5 Mobileye EyeQ Chip Users and Shipments
    • 3.2.6 Mobileye EyeQ4 Chip
    • 3.2.7 Mobileye EyeQ4 Parameters and Applied Cases
    • 3.2.8 Mobileye EyeQ5 Chip
    • 3.2.9 Mobileye EyeQ5 Chip Achitecture
    • 3.2.10 Mobileye EyeQx Product Line and Its Integration with INTEL System
    • 3.2.11 Intel New-generation FPGA
    • 3.2.12 Intel L3 Autonomous Driving Development Platform
    • 3.2.13 Intel Chip Use in BMW Autonomous Driving Platform
    • 3.2.14 Intel Mobileye's Collaborations on Automotive Chip
    • 3.2.15 Evolution of Intel AI Chips
  • 3.3 TI
    • 3.3.1 Company Profile
    • 3.3.2 TI's Automotive Master Chips
    • 3.3.3 TI's Launch of Next-generation Automotive Processor Platform
    • 3.3.4 TI Jacinto 7 System Architecture
    • 3.3.5 TI's ADAS Chip -- TDAx
    • 3.3.6 Features of TDA4VM
  • 3.4 Qualcomm
    • 3.4.1 Company Profile
    • 3.4.2 Qualcomm's Efforts in Automotive Chips
    • 3.4.3 Qualcomm's Automotive Chips
    • 3.4.4 Qualcomm's 3rd-Gen Chip Platform
    • 3.4.5 Snapdragon Ride Autonomous Driving Platform
    • 3.4.6 Snapdragon Ride Software Platform
    • 3.4.7 Three Configuration Versions of Snapdragon Ride
  • 3.5 NVIDIA
    • 3.5.1 Company Profile
      • 3.5.1.1 Brief Introduction
      • 3.5.1.2 List of NVIDIA Automotive Chips
      • 3.5.1.3 Automotive Chip Roadmap of NVIDIA
      • 3.5.1.4 Ampere GPU Architecture
      • 3.5.1.5 NVIDIA GPU Architecture Technology Roadmap
      • 3.5.1.6 Comparison between NVIDIA Autonomous Driving Chip Parameters
      • 3.5.1.7 NVIDIA Autonomous Driving Chip Ecosystem
      • 3.5.1.8 NVIDIA's Collaborations on Autonomous Driving
      • 3.5.1.9 NVIDIA's Ranking in Autonomous Driving Chips
    • 3.5.2 NVIDIA AGX
      • 3.5.2.1 Introduction to NVIDIA AGX
      • 3.5.2.2 Introduction to AGX Xavier
      • 3.5.2.3 Composition of AGX Xavier
      • 3.5.2.4 Pegasus
      • 3.5.2.5 DRIVE AGX Orin
      • 3.5.2.6 Three Types of DRIVE AGX Orin
    • 3.5.3 NVIDIA Autonomous Driving Software
      • 3.5.3.1 NVIDIA Software Stack
      • 3.5.3.2 NVIDIA DRIVE AutoPilot
      • 3.5.3.3 DRIVE AutoPilot Users
      • 3.5.3.4 AP2X Software Solution
      • 3.5.3.5 Autonomous Driving Simulation Platform
  • 3.6 Renesas
    • 3.6.1 Company Profile
    • 3.6.2 Autonomous Driving Layout of Renesas
    • 3.6.3 Renesas Improves Its Weaknesses
    • 3.6.4 Renesas R-Car Auto-grade Chip Technology Roadmap
    • 3.6.5 Renesas 3rd-Gen R-Car Master Chip (I)
    • 3.6.6 Renesas 3rd-Gen R-Car Master Chip (II)
    • 3.6.7 Renesas 3rd-Gen R-Car Master Chip (III)
    • 3.6.8 Comparison of Master Chips between Renesas and Its Competitors
    • 3.6.9 Renesas R-Car Virtualization Support Package
    • 3.6.10 Chip Use in Renesas L4 Computing Platform
    • 3.6.11 Next-generation Autonomous Driving SoC of Renesas
    • 3.6.12 Autonomy Ecosystem of Renesas
    • 3.6.13 Renesas Collaborations on Automotive Chip
  • 3.7 Xilinx
    • 3.7.1 Company Profile and Its Products
    • 3.7.2 Xilinx Zynq UltraScale+MPSoC 7EV
    • 3.7.3 Virtex UltraScale+ VU19P
    • 3.7.4 Xilinx SoC+FPGA Series (I)
    • 3.7.5 Xilinx SoC+FPGA Series (II)
    • 3.7.6 Xilinx Scalable Product Series
    • 3.7.7 Versal ACAP Series
    • 3.7.8 Xilinx's Launch of Vitis, a Unified Software Development Platform
    • 3.7.9 High Throughput and Low Latency
    • 3.7.10 RFSoC Development Roadmap
    • 3.7.11 Zynq UltraScale+ MPSoC Product Features
    • 3.7.12 Cases of Xilinx Chips Used in Automobile
    • 3.7.13 Xilinx AD/ADAS Application Route
    • 3.7.14 Xilinx Automotive Chip Partners
  • 3.8 Tesla
    • 3.8.1 Tesla Autopilot System and Processor Evolution
    • 3.8.2 A Plan to Spawn FSD Chip with 7nm Process
    • 3.8.3 Tesla Self-developed FSD Chip
    • 3.8.4 FSD Dual-redundancy Chip Design
    • 3.8.5 Tesla Self-developed Chip: Composition
    • 3.8.6 Tesla Self-developed Chip: NNA
    • 3.8.7 Tesla Self-developed Chip: ISP
    • 3.8.8 Summary of Tesla Chips

4 Chinese ADAS/AD Master Chip Vendors

  • 4.1 Horizon Robotics
    • 4.1.1 Journey Chips of Horizon Robotics
    • 4.1.2 Autonomous Driving Computing Platform of Horizon Robotics
    • 4.1.3 Chip Ecosystem Planning of Horizon Robotics
    • 4.1.4 Autonomous Driving Chip Architecture Roadmap of Horizon Robotics
    • 4.1.5 2nd-Gen Journey Processor (Journey™ 2) of Horizon Robotics
    • 4.1.6 Autonomous Driving Computing Platform -- Matrix1.0
    • 4.1.7 Journey 3 Chip of Horizon Robotics
    • 4.1.8 Next-Generation Journey 5 & Journey 6 of Horizon Robotics
    • 4.1.9 Auto-grade AI Chip Clients of Horizon Robotics
    • 4.1.10 Automotive Chip Partners of Horizon Robotics
  • 4.2 Huawei
    • 4.2.1 Intelligent Vehicle Business of Huawei
    • 4.2.2 Huawei Is Only Second to Bosch as concerns CASE Deployments
    • 4.2.3 Aim to be a Supplier of Incremental Parts for Cars
    • 4.2.4 Automotive Chips of Huawei
    • 4.2.5 Automotive Computing Platform Products of Huawei
    • 4.2.6 Huawei Ascend 910 and Ascend 310
    • 4.2.7 All-scenario AI Computing Architecture -- MindSpore
    • 4.2.8 MDC Autonomous Driving Computing Platform Architecture
  • 4.3 Ambarella
    • 4.3.1 Company Profile
    • 4.3.2 Development Course
    • 4.3.3 Ambarella Computer Vision Chip Architecture
    • 4.3.4 Vision Chip CV Series
    • 4.3.5 Viewing/Recording Chip
    • 4.3.6 Vision Chip CV22AQ
    • 4.3.7 Applied Scenarios of Ambarella Vision Chips and Its Partners
    • 4.3.8 Ambarella's Main Clients in Automotive Business
    • 4.3.9 Cases of Ambarella Chips Applied
  • 4.4 Black Sesame Technologies
    • 4.4.1 Company Profile
    • 4.4.2 Black Sesame Perception Platform Solutions
    • 4.4.3 Black Sesame Perception & Computing Chips
    • 4.4.4 Black Sesame Intelligent Driving Platform SOC
    • 4.4.5 Black Sesame Intelligent HuaShan Chip Series
    • 4.4.6 Intelligence Developments of Black Sesame
  • 4.5 SemiDrive
    • 4.5.1 Company Profile
    • 4.5.2 SemiDrive Master Chips
    • 4.5.3 SemiDrive ADAS Chip V9
    • 4.5.4 SemiDrive Vehicle-On-Chip Strategy
    • 4.5.5 Developments of SemiDrive
  • 4.6 Westwell Lab
    • 4.6.1 Company Profile
    • 4.6.2 Core Technologies on Westwell AI Chip
    • 4.6.3 Westwell's Autonomous Driving Terminals and Applications