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A Guide to CPU Cores and Processor IP, Seventh Edition

出版商 Linley Group 商品編碼 302677
出版日期 內容資訊 英文
商品交期: 最快1-2個工作天內
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PU核心及處理器IP的指南 A Guide to CPU Cores and Processor IP, Seventh Edition
出版日期: 2017年01月31日 內容資訊: 英文



第1章 半導體:IP概要

  • IP是什麼?
  • IP的提供和創建實例
    • 軟核心 VS 硬核心
    • 加工技術和程序庫
  • IP的應用
    • 蜂巢式終端設備
    • 其他行動應用程式
    • 消費者應用
    • 網路、儲存應用
    • 微控制器、智慧卡、其他應用

第2章 IP技術

  • IP標準
    • Accellera和IP-XACT
    • Verilog及VHDL RTL/HDL標準
    • 合成、場所、途徑
    • Amba和OCP
  • 多媒體標準
    • 影音解析度、畫面更新率
    • 進階音訊標準
  • 圖形標準
    • 2D圖形
    • 3D圖形
    • 3D圖形開發平台
    • 3D渲染架構
    • 圖形性能
  • 行動電話技術
    • 2G技術
    • 3G技術
    • 4G技術OFDM
    • 4G技術LTE

第3章 IP的引進

  • CPU是什麼?
    • 什麼不是CPU?
  • GPU是什麼?
    • 什麼不是GPU?
  • 處理器的微架構
    • 資料的種類
    • 指令的發信
    • 流水線、損失
    • 快取、緊密耦合記憶體(TCM)
    • 多核心、SMP
    • 多線
  • CPU設計
    • MMU、TLB
  • GPU設計
    • 統一渲染
    • 區塊分割式延遲渲染
    • 預備Z測試
    • 典型性的GPU架構
  • 基準
    • CPU基準
    • 圖形基準

第4章 市場規模與趨勢

  • 市場規模、佔有率
    • CPU IP
    • GPU IP
  • IP應用市場
    • 各IP出貨量、應用分類
    • 應用市場趨勢
  • 處理器IP預測
  • IP趨勢

第5章 ARM

  • 公司介紹
  • 主要的特徵與性能
    • Cortex-A CPU
    • Cortex-R CPU
    • Mali GPU
  • 設計詳細內容
    • Cortex-A15 CPU
    • Cortex-A57 CPU
    • Cortex-A7 CPU
    • Cortex A53 CPU
    • Cortex A5、Cortex-R5,及Cortex R4 CPU
    • Neon
    • CPU系統界面
    • Mali圖形處理器
  • 開發工具
  • 產品藍圖
  • 整體概述

第6章 Cadence(Tensilica)

  • 公司介紹
  • Tensilica指令套組
  • 主要的特徵與性能
  • 設計詳細內容
  • 開發工具
  • 產品藍圖
  • 整體概述

第7章 IBM

  • 公司介紹
  • PowerPC指令套組
  • 主要的特徵與性能
  • 設計詳細內容
  • 開發工具
  • 產品藍圖
  • 整體概述

第8章 Imagination(MIPS)

  • 公司介紹
  • MIPS指令套組
  • 主要的特徵與性能
    • 微處理器
    • PowerVR GPU
    • PowerVR Series6
  • 設計詳細內容
    • MicroAptiv CPU
    • InterAptiv CPU
    • ProAptiv CPU
    • Meta CPU
    • PowerVR Series5/Series5XT (SGX) GPU
    • PowerVR Series6 GPU (Rogue)
  • 開發工具
  • 產品藍圖
    • 微處理器
    • GPU
  • 整體概述

第9章 Synopsys(ARC)

  • 公司介紹
  • ARC指令套組
  • 主要的特徵與性能
  • 設計詳細內容
  • 開發工具
  • 產品藍圖
  • 整體概述

第10章 Vivante

  • 公司介紹
  • 主要的特徵與性能
  • 設計詳細內容
  • 開發工具
  • 產品藍圖
  • 整體概述

第11章 其他IP供應商

  • Adapteva
    • 公司介紹
    • 主要的特徵與性能
    • 整體概述
  • Aeroflex Gaisler
    • 公司介紹
    • 主要的特徵與性能
    • 整體概述
  • Andes
    • 公司介紹
    • 主要的特徵與性能
    • 整體概述
  • Cortus
    • 公司介紹
    • 主要的特徵與性能
    • 整體概述
  • Beyond Semiconductor
    • 公司介紹
    • 主要的特徵與性能
    • 整體概述
  • Digital Media Professionals (DMP)

第12章 處理器IP比較

  • CPU內核
    • 低階(深深地被填埋擁擠)CPU
    • 高階包藏CPU
    • 中階應用CPU
    • 高性能應用CPU
  • GPU核心
    • 低成本GPU
    • 中階GPU
    • 高階GPU

第13章 整體概述

  • 市場及技術的方向性
    • 系統趨勢
    • CPU-IP趨勢
    • GPU-IP趨勢
  • 供應商的展望
    • ARM
    • Imagination/MIPS
    • Synopsys
    • Cadence (Tensilica)
    • 其他供應商
  • 結論



Everyone Needs IP

With rising transistor budgets and the trend toward system-on-a-chip design, designing an entire complex ASIC or ASSP in house has become increasingly impractical. As a result, the market for licensed function blocks, known as intellectual property (IP), is growing rapidly. The most popular IP blocks are programmable processors such as CPUs and GPUs. As system designers seek simpler ways to connect all of their IP cores, we have seen surging interest in network-on-a-chip (NoC) IP as well.

Several suppliers provide CPU IP, each offering unique advantages. Some CPUs are easily customized, others include security features, while still others support multicore implementations. GPUs can accelerate 2D, 3D, and/or vector graphics using fixed or programmable engines. NoC IP provides a scalable and configurable interconnect to reduce the design burden. For all types of IP, the available options range widely in performance, die area, and power.

"A Guide to CPU Cores and Processor IP" sorts through these options, evaluating the high-performance designs available from the leading IP vendors. The report provides in-depth coverage of CPUs and GPUs, including those from ARM (Cortex, Mali), Cadence (Tensilica), Imagination (MIPS, PowerVR), Synopsys (ARC), and VeriSilicon (Vivante). Also covered are Adapteva, Andes, Beyond Semiconductor, Cortus, and RISC-V, as well as NoC IP vendors Arteris, NetSpeed, and Sonics.

Make the Right Choice

For each vendor, we describe each IP core offered, provide key metrics such as performance and die area, discuss important topics such as development tools and support, outline the future roadmap, and summarize the strengths and weaknesses of the offering. The report also provides background on how IP is used, an overview of common end markets such as consumer electronics and networking equipment, and market share and forecast data for the types of IP covered. We conclude with a side-by-side comparison of IP cores and our long-term views on the industry.

As the leading vendor of technology analysis for mobile and communications chips, The Linley Group has the expertise to deliver a comprehensive look at this burgeoning market. Analysts Mike Demler and Loyd Case use their extensive experience in the semiconductor market to deliver the technical and strategic information you need to make informed business decisions.

Whether you are looking for an innovative solution for your design, a vendor to partner with, or a rising company to invest in, this report will cut your research time and save you money. Get the inside scoop on this major market. Order "A Guide to CPU Cores and Processor IP" today.

This report is written for:

  • Engineers who need to select IP for the ASICs or standard products (ASSPs) they are designing
  • Marketing and engineering staff at companies that sell IP, design services, or software that runs on processor IP
  • Technology professionals who want an introduction to CPU, GPU, or NoC IP
  • Financial analysts who desire a detailed analysis and comparison of IP companies and their chances of success
  • Press and public relations professionals who need to get up to speed on IP technology

What's New in this Edition

Updates to the Seventh Edition of "A Guide to CPU Cores and Processor IP"

"A Guide to CPU Cores and Processor IP" has been updated to incorporate new announcements made since the publication of the previous edition.

Here are some of the many changes you will find:

  • Added coverage of ARM Cortex-A73, Cortex-A32, Cortex-R52, Cortex-M23/33, and updated Cortex roadmap
  • Added coverage of ARM's new Bifrost GPU architecture plus Mali-G51 and G71
  • Added coverage of Imagination (MIPS) I6500 CPU
  • Added coverage of Imagination's new Series8 GPUs including the PowerVR GE8200 and GE8300 families
  • Added coverage of Synopsys ARC SEM110 and SEM120D
  • Added coverage of Vivante GC800 family from VeriSilicon
  • New coverage of the RISC-V instruction set and SiFive CPUs
  • Added coverage of Xtensa LX7 from Cadence
  • Added coverage of cache-coherent NoC IP from Arteris (Ncore) and NetSpeed (Gemini II)
  • Added coverage of ARM's CoreLink CMN-600 and SIE-200
  • All new comparisons for CPUs, GPUs, and NoCs
  • 2015 and preliminary 2016 market-size and vendor-share data
  • Updated market forecast through 2020

Executive Summary

The processor-IP market continues to grow as more SoC designers adopt licensed cores for CPUs, GPUs, and NoCs. More than 22 billion chips containing CPU IP shipped during 2016. Despite slowing growth for smartphones and tablets, CPU-IP shipments increased by 10% in 2016, compared with a 23% surge the prior year. Even though the mobile market is maturing, we expect emerging applications such as automotive ADAS and the Internet of Things (IoT) to drive an 11% compound annual growth rate (CAGR) through 2020.

In 2016, shipments of licensed GPUs improved by 19% owing to a loss of mobile-market share by companies such as Intel and Qualcomm, which use in-house designs. Mobile shipments employing licensed GPUs rose several percent, and customers upgrading to larger smart TVs with graphical user interfaces created a brisk market.

Cellular handsets continue to be the highest-volume market for CPU and GPU IP. A single handset may have separate CPUs for the cellular baseband, application subsystem, sensor hub, and peripheral functions such as Bluetooth, GPS, Wi-Fi, touchscreen, and power management. Other large markets include chips for consumer electronics such as digital TVs, media players, and set-top boxes; processors for home networking gear such as broadband gateways and Wi-Fi routers; storage controllers for hard drives and flash-memory drives; and processors for communications infrastructure and data-center servers.

Because of their growing complexity, most of these systems use ever more and faster CPUs. Process-technology advances enable companies to integrate large numbers of CPU cores on a single chip. Chip designers face a make-versus-buy decision for CPUs; most choose to buy (license) an IP core and focus their efforts on combining IP blocks, peripherals, and custom logic into a design that's ideal for their end application.

This report also covers licensable network-on-a-chip (NoC) IP. NoCs address the problem of increasing complexity in modern SoCs, providing an automated method of linking all the cores together. Unlike CPU and GPU cores, implementing a NoC requires customization for the unique architecture of each SoC and thus demands a robust and highly automated tool set. Compared with designing interconnects by hand, this approach helps optimize power and ensures timing closure.

ARM is by far the leading CPU-IP supplier, having a 77% share in 2016. The company added several new CPU cores during that year, including the low-cost Cortex-M23/M33, the resilient Cortex-R52, and the high-performance Cortex-A73. Synopsys enhanced its CPU lineup with the new ARC SEM series, which offers enhanced security features. In 2016, the company also added a new deep-learning computer-vision subsystem to its DesignWare catalog.

In 2016, Imagination Technologies released only one new CPU core - the MIPS I6500. That midrange design offers an alternative to ARM's "little" cores, but it's less area and power efficient. It remains popular with customers such as Mobileye, however, owing to its unique hardware multithreading capability. Cadence's customizable Xtensa CPU shipments rose by 31% in 2016. Rather than offer new preconfigured designs, the company emphasizes frequent updates to its base LX architecture, in addition to offering application-specific subsystems.

A number of smaller CPU-IP vendors - such as Andes, Beyond Semiconductor, and Cortus - offer alternatives to customers for whom compatibility with a more well-known instruction set is less important than customizable features, small die size, and low licensing fees. These cores mostly target low-cost deeply embedded devices. A new competitor has emerged in RISC-V, a royalty-free instruction set with open-source CPU cores.

Among GPU-IP products, ARM's Mali family extended its popularity from low-cost to premium smartphones, leading in unit shipments. The market share of Imagination's PowerVR declined to less than 30% as its Series7 cores fell behind Mali in performance per unit area and its high-end Series8 design was delayed. VeriSilicon completed its acquisition of Vivante, which provides GPUs for consumer electronics as well as for high-reliability applications such as aerospace and military.

Sonics is the largest independent developer of NoC IP, offering the broadest range of NoCs, including subsidiary products for memory control and power management. Arteris complements its basic NoC features with a timing-closure tool and support for fault-tolerant networks. In 2016, it added a cache-coherent interconnect to its product line. NetSpeed emphasizes support for cache-coherent processors with its NoCs, and it delivers the industry's most highly automated implementation tools. ARM added a new mesh network to its CoreLink portfolio. The company's connectivity IP is widely used for clusters of CPUs, but it lacks a comprehensive and automated solution to match the offerings from the smaller independent NoC vendors.

Different designers emphasize different parameters for the IP they use, such as interfaces, I/O bandwidth, power consumption, die area, performance, instruction-set compatibility, and roadmap. Therefore, selecting the right IP is a complex and difficult task. This report details each vendor's products, strategy, and market position, covering CPU, GPU, and NoC IP.

Table of Contents

List of Figures

List of Tables

About the Authors

About the Publisher


Executive Summary

1 Semiconductor-IP Overview

  • What Is IP?
  • Delivering and Instantiating IP
    • Soft Cores Versus Hard Cores
    • Process Technology and Libraries
  • IP Applications
    • Cellular Handsets
    • Other Mobile Applications
    • Consumer Applications
    • Networking and Storage Applications
    • Microcontrollers, Smartcards, and Other Applications

2 IP Technology

  • IP Standards
    • Accellera and IP-XACT
    • Verilog and VHDL RTL/HDL Standards
    • Synthesis and Place and Route
    • Amba and OCP
  • Multimedia Standards
    • Video Resolution and Frame Rates
    • Audio Codecs
    • Video Codecs
    • Digital-Rights Management
  • Graphics Standards
    • 2D Graphics
    • 3D Graphics
    • 3D-Graphics Pipeline
    • 3D-Shader Architecture
    • Graphics Performance
  • Cellular Technologies
    • 2G Technologies
    • 3G Technologies
    • 3.5G Technologies
    • 4G and Beyond

3 IP Implementations

  • What Is a CPU?
  • What Is a GPU?
  • What Is a NoC?
  • Processor Microarchitecture

List of Figures

  • Figure 1-1. Block diagram of a generic basic phone.
  • Figure 1-2. Block diagram of a generic application processor.
  • Figure 1-3. Block diagram of a generic mobile Wi-Fi chip.
  • Figure 1-4. Block diagram of a generic digital-TV chip.
  • Figure 1-5. Block diagram of a generic 802.11 access point.
  • Figure 1-6. Block diagram of a generic high-end hard-drive controller.
  • Figure 2-1. Logic circuit that implements simple Verilog code.
  • Figure 2-2. GDS II file being edited in Magic.
  • Figure 2-3. Raster graphics versus vector graphics.
  • Figure 2-4. Apple's Cover Flow effect.
  • Figure 2-5. Standard hard-wired 3D pipeline.
  • Figure 2-6. Standard programmable 3D pipeline.
  • Figure 3-1. CPU pipelining examples.
  • Figure 3-2. Generic multicore processor.
  • Figure 3-3. Interleaved tasks on a multithreaded processor.
  • Figure 3-4. Block diagram of a generic CPU.
  • Figure 3-5. Block diagram of a generic shader-based 3D GPU.
  • Figure 3-6. Block diagram of a bus matrix.
  • Figure 3-7. Block diagram of a generic NoC.
  • Figure 4-1. Unit market share for 32/64-bit CPU IP, 2015-2016.
  • Figure 4-2. Unit market share for 32/64-bit GPU IP, 2015-2016.
  • Figure 4-3. CPU-IP shipments by application category, 2016.
  • Figure 4-4. GPU-IP shipments by application category, 2016.
  • Figure 4-5. Mobile-device forecast, 2014-2020.
  • Figure 4-6. Embedded-device and flash-memory forecast, 2014-2020.
  • Figure 4-7. Consumer-electronics forecast, 2014-2020.
  • Figure 4-8. Enterprise-device forecast, 2014-2020.
  • Figure 4-9. CPU-IP forecast by application category, 2014-2020.
  • Figure 4-10. GPU-IP forecast by application category, 2014-2020.
  • Figure 5-1. Baseline and mainline features in the ARMv8-M ISA.
  • Figure 5-2. Relative area and performance of ARM Cortex-A CPUs.
  • Figure 5-3. Block diagram of ARM Big.Little system architecture.
  • Figure 5-4. Block diagram of ARM Cortex-A7 CPU.
  • Figure 5-5. Block diagram of ARM Cortex-A57 CPU.
  • Figure 5-6. Block diagram of ARM Cortex-A72 CPU.
  • Figure 5-7. Block diagram of ARM Cortex-A73 CPU.
  • Figure 5-8. Pipeline diagram of ARM Cortex-A53 CPU.
  • Figure 5-9. Pipeline diagram of ARM Cortex-A35 CPU.
  • Figure 5-10. Block diagram of ARM Cortex-R7 CPU.
  • Figure 5-11. Block diagram of ARM Cortex-R52 CPU.
  • Figure 5-12. Block diagram of ARM Cortex-M7 CPU.
  • Figure 5-13. Block diagram of ARM Cortex-M33 CPU.
  • Figure 6-1. Andes N8 CPU in an electronic-label controller.
  • Figure 7-1. Block diagram of the Xtensa LX7 microarchitecture.

List of Tables

  • Table 2-1. Standard screen sizes.
  • Table 2-2. Cellular technologies and data rates.
  • Table 4-1. Unit market share for 32/64-bit CPU IP, 2015-2016.
  • Table 4-2. Unit market share for 32/64-bit GPU IP, 2015-2016.
  • Table 5-1. Key parameters for selected ARM 32-Bit Cortex-A CPUs.
  • Table 5-2. Key parameters for ARM 64-Bit Cortex-A CPUs.
  • Table 5-3. Key parameters for ARM Cortex-R CPUs.
  • Table 5-4. Key parameters for ARM Cortex-M CPUs.
  • Table 6-1. Key parameters for Andes v3 CPU cores.
  • Table 7-1. Key parameters for Tensilica reference template CPUs.
  • Table 8-1. Key parameters for Imagination MIPS Warrior CPU cores.
  • Table 9-1. RISC-V base instruction sets and extensions.
  • Table 9-2. Key parameters for SiFive CPU cores.
  • Table 10-1. Key parameters for Synopsys ARC EM and SEM cores.
  • Table 10-2. Key parameters for Synopsys ARC HS cores.
  • Table 11-1. Key parameters for Adapteva Epiphany cores.
  • Table 11-2. Key parameters for Beyond CPU cores.
  • Table 11-3. Key parameters for Ceva baseband-controller IP.
  • Table 11-4. Key parameters for first-generation Cortus CPU cores.
  • Table 11-5. Key parameters for Cortus APS2x CPU cores.
  • Table 12-1. Comparison of low-end embedded CPU cores.
  • Table 12-2. Comparison of midrange embedded CPU cores.
  • Table 12-3. Comparison of high-end embedded CPU cores.
  • Table 12-4. Comparison of low-end CPU cores.
  • Table 12-5. Comparison of high-performance CPU cores.
  • Table 13-1. Key parameters for Mali ultra-low-power GPUs.
  • Table 13-2. Key parameters for Mali area-optimized GPUs.
  • Table 13-3. Key parameters for Mali performance-optimized GPUs.
  • Table 14-1. Key parameters for Imagination Series7 GPUs.
  • Table 14-2. Key parameters for Imagination Series8XE GPUs.
  • Table 15-1. Key parameters for VeriSilicon GC8000 high-end GPUs.
  • Table 15-2. Key parameters for VeriSilicon GC8000 low-end GPUs.
  • Table 16-1. Comparison of GPU cores for wearables.
  • Table 16-2. Comparison of low-cost GPU cores.
  • Table 16-3. Comparison of midrange GPU cores.
  • Table 16-4. Comparison of high-end GPU cores.
  • Table 17-1. Key parameters for ARM CCI and NIC interconnects.
  • Table 17-2. Key parameters for ARM CCN and CMN interconnects.
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