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市場調查報告書

薄化晶圓的市場與用途

Thin Wafer Market & Applications

出版商 Yole Developpement
出版日期 2011年10月 商品編碼 216975
內容資訊 英文  
價格
US $ 5390 PDF by E-mail (Single user license)
US $ 7990 PDF by E-mail (Corporate Use License)


薄化晶圓的市場與用途 是由出版商Yole Developpement在2011年10月所出版的。 這份英文市場調查報告書價格從美金5390起跳。

簡介

由於使用薄化晶圓,將可達到高密度互連(可大幅縮小TSV的間距與尺寸)、瓦特損失的改善、電力性能的提昇、封裝小型化等,預料今後使用薄化晶圓的晶片比例將會提高。特別是在家電市場,變得要求小型、高性能、低價格的產品,這是促進小型且薄化晶片開發和薄化晶圓普及的一大因素。薄化晶圓逐漸使用於MEMS、CMOS影像感測器、3次元堆疊裝置、記憶體、高頻率裝置、電源裝置、LED等各種用途,被認為其影響將會延伸至製造技術和材料等領域。

本報告,提出在半導體IC用晶圓市場上地位逐漸提高的薄化晶圓(300μm∼40μm)與超薄化晶圓(未滿40μm),並提示至2016年的展望,概述主要企業和各種用途市場的動向、薄化晶圓的加工技術,由下列摘要形式闡述。

本報告的目的

目錄

本報告所提出的企業

報告摘要

2010∼2016年的薄化晶圓市場預測

  • 薄化晶圓與晶圓整體的出貨量比較
  • 以300mm晶圓換算的薄化晶圓出貨量
  • 2010∼2016年的用途別薄化晶圓出貨預測
  • 2010∼2016年的晶圓直徑別薄化晶圓出貨預測
  • 2010∼2016年的晶圓厚度別薄化晶圓出貨預測

參與薄化晶圓市場的企業

  • 2010年的主要薄化晶圓市場
  • 2010年薄化晶圓加工業界的地區別詳細內容
  • 2010年薄化晶圓加工業界的晶圓尺寸別詳細內容
  • 薄化晶圓加工企業

薄化晶圓的用途

  • MEMS
  • CMOS影像感測器
  • 記憶體與邏輯裝置
  • 電源裝置
  • 高頻率裝置(GaAs)
  • LED
  • 先進封裝:3次元TSV/中介層

薄化晶圓加工技術的概要

  • 晶圓薄化
  • 乾式研磨
  • 薄化晶圓加工:各種解決方案
  • 晶圓切割

結論

附錄

目錄

Abstract

27% of total processed semiconductors are thinned today. In 2016, this ratio will exceed 50%!

DESCRIPTION:

THIN WAFERS TARGET MANY APPLICATIONS

Thin wafers will be increasingly used in many diverse applications. The Yole “Thin Wafer Applications” report describes the applications that require thin and ultra-thin wafers: MEMS, CMOS Image Sensors, 3D Packaging (incl. Interposers), Memories, RF Devices, Power Devices and LEDs.

While Memories & Logic will account for the largest fraction of thinned wafers, many other applications are concerned.

Thin Wafers Revenues Breakdown in 2016 - in US$M

Thin wafer applications & market value breakdown by application (2016)

MEMS are always characterized by a wide range of process and technologies. This is certainly the application where the widest range of wafer thickness can be found (e.g. the 3-axis gyro from InvenSense is a stack of 3 wafers with intermediate layer of 33μ thickness). To answer the need for thinner sensors for cell phone applications, capping, sensitive elements and MEMS ASIC will get thinner over the next years, specifically for inertial MEMS. For CMOS Image Sensors (CIS), Backside Illumination (BSI) now enables 100% Fill-factor, which opens the opportunity for CMOS sensor with higher Sensitivities or Higher Resolution. But we need to handle VERY thin layer as for a BSI CIS, the active layer is < 10μ. CIS wafers will also be thinner for packaging purposes (TSV, WLCSP).

Memories can be stacked in different ways: wire bonding or TSV. 3D stacking is the next big thing for memory integration with thickness as low as 25μ in 2016. But wire bonding will still be used for a few years and TSV volume will start to be significant in 2013.

Main Power Devices requiring thin wafers are IGBTs but others power devices could use thin wafers. For Power Devices, thin wafers allow low Ron, thus improve current carrying capability and minimize power consumption. For LEDs, GaAs, sapphire and SiC wafers are thinned as well.

Ratio of thinned wafers vs. total number of shipped wafers
(volume in millions of 300mm eq.)

Market forecast for thinned wafers

MARKET DRIVERS FOR THIN WAFERS

Motivations for thin wafers are: high interconnect density (such as aggressive TSV pitch & diameters), better power dissipation and higher electrical performance and reduced package size.

Consumer electronics are driving the need for smaller, higher performing, lower cost device configurations for use in applications such as memory, wireless devices... These new options, in turn, are pushing demand for a reduction in chip thickness from the traditional 500μ thickness to about 40 μm. Thin dies are driving the need for thin and even ultra-thin semiconductor wafers (below 50μm).

Such dramatic changes will have strong impact on the equipment and materials side as well as new process and bonding technologies will be required for handling such fragile wafers. Yole has covered the equipment and processing aspects in the previous “Thin Wafer Manufacturing” report.

General Wafer Thickness 2010-2016 in μm
Trends by application

Thin wafer roadmap

COMPANIES CITED IN THE REPORT:

3M, Accretech, ADI, AIT, AkM, ALLVIA, ALSI, AMAT, Aptina / Micron, Avago, Brewer, Canon, Corning, Cree, Dalsa, Denka, Denso, Discera, Disco, Dongbu HiTek, DoubleCheck Semiconductors, Dynatex, Dupont, Dynatex, Elmos (SMI), Elpida, Epistar, ERS, ESI, EVG, FhG IZM, Fico, Formosa Epitaxy, Freescale, Genesis, Furukawa, Hamamatsu, HH NEC / Grace, Hitachi Chemical, Huga, Hynix, IBM, IMT, Infineon, Intel, Invensense, JCAP, kionix, Laserod, Lextar, Lighthouse (AU Opto), LG Innotek, Lintec, Loadpoint, Lumileds, Micralyne, Micron, Mitsui Chemical, Nanya, Nichia, Nitta, Nitto Denko, Osram, Panasonic, PlanOptik, Powerchip, ProMOS, Renesas, Ricmar, Robert Bosch, Rorze, Samsung, Schott, Scrypt, Sekusui, Seoul Optodevice, Shinko, Silex, SMIC, Sony, Spansion, STM, Strasbaugh, Sumitomo Chemical, SUSS MicroTec, Synova, Sysmelec, Takada, Tekcore, TEL, Texas Instruments, Tezzaron, TMAT, tMt, TOk, Toshiba, Tower, Toyoda Gosei, Tronic' s, TSMC, Veeco, VTI, X-Fab, Xiamen Sanan Optoelectronics, Yushin.

BENEFITS:

KEY FEATURES OF THE REPORT

The objectives of the report are the following:

  • Provide an understanding of the thin wafer applications:
    • Overview of the thin wafer applications: MEMS, CMOS Image Sensors, Memories, Power Devices, RF Devices, LEDs, Interposers
    • Thin wafers roadmaps
  • Give market forecasts for thin wafers:
    • 2011-2016 Market Forecast in units and US$ for thin wafers
    • Detailed forecasts by application, wafer size and thickness
  • Analyze the trends for wafer thinning
    • Thinning technologies overview
    • Players

WHO SHOULD BUY THIS REPORT?

  • Foundries & chip manufacturers
    • Get an overview of the large panel of accessible applications for thin wafers
    • Identify the key trends into wafer thickness reduction
    • Monitor and benchmark your competitor' s advancements
  • Thinning tools/services & materials (chemistry, wafers) providers
    • Identify and evaluate what the requirements for thinning wafers will be
    • Analyze the threads and opportunities
    • Evaluate the market value and volume

BIO

Dr. Eric Mouier has a PhD in microelectronics from the INPG in Grenoble. He previously worked at CEA LETI in Grenoble, France in Marketing dept.

Amandine Pizzagalli has recently joined Yole Devéloppement as a technology & marketing analyst in the fields of Advanced Packaging & MEMS manufacturing processes, from both equipment & materials perspectives.

ABOUT YOLE DEVÉLOPPEMENT

Beginning in 1998 with Yole Devéloppement, we have grown to become a group of companies providing market research, technology analysis, strategy consulting, media in addition to fi nance services. With a solid focus on emerging applications using silicon and/or micro manufacturing Yole Devéloppement group has expanded to include more than 40 associates worldwide covering MEMS, Microfluidics & Medical, Advanced Packaging, Compound Semiconductors, Power Electronics, LED, and Photovoltaic. The group supports companies, investors and R&D organizations worldwide to help them understand markets and follow technology trends to develop their business.

Table of Contents

Objective of the report

Table of contents

List of companies mentioned in the report

Executive summary

2010-2016 Thin wafer market forecasts

  • Thinned wafers vs. TOT number of shipped wafers
  • Thin wafers shipment in 300 mm eq.
  • 2010-2016 thin wafer shipment forecast by application
  • 2010-2016 thin wafer shipment forecast by wafer diameter
  • 2010-2016 thin wafer shipment forecast by wafer thickness

Thin wafer players

  • 2010 main thin wafers
  • 2010 geographic breakdown for thin wafer processing in % of number of processed wafers
  • 2010 wafer size breakdown for thin wafer processing in % of number of processed wafers
  • Thin wafer processors

Description oF applications

  • MEMS
  • CMOS Image Sensors
  • Memory & Logic
  • Power Devices
  • RF Devices (GaAs)
  • LEDs
  • Advanced Packaging:3D TSV/Interposers

Thin wafer Technologies overview

  • Wafer Thinning
  • Dry Polishing
  • Thin Wafer Handling: the different solutions
  • Wafer Dicing

Final conclusions

Appendices

  • Yole Devéloppement presentation
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