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市場調查報告書

晶圓封裝廠資料庫

Wafer Packaging Fab Database

出版商 Yole Developpement
出版日期 2011年09月 商品編碼 206538
內容資訊 英文  
價格
US $ 5390 PDF by E-mail ( Single User License)
US $ 7990 PDF by E-mail (Corporate Use License)


晶圓封裝廠資料庫 是由出版商Yole Developpement在2011年09月所出版的。 這份英文市場調查報告書價格從美金5390起跳。

簡介

半導體產業對晶圓層次電子構裝(WLP)的相關需求急遽增加。除了覆晶晶圓凸塊(晶圓植球)技術和晶圓級晶片尺寸封裝(WLSCP)以外,與3D WLP相對應的矽穿孔技術(TSV),2.5D內插器,3D IC,扇出型WLP等新技術也相繼出現,為了擴大晶圓封裝廠的產能,將統整系統以滿足晶圓封裝廠的需求 。

這個資料庫涵蓋了提供設備和材料的企業,無晶圓廠及晶圓廠半導體企業等涉及WLP相關業務合作的多數企業,各公司現有的WLP技術和新技術的研究開發,同時也提供試製品生產線等資訊,為您概述為以下內容。

本資料所網羅的資訊

  • 一般的資訊
    • 晶圓廠所在地
    • 晶圓廠的功能(前端,後端等)
    • 主要的顧客,合資企業,合作
  • 各地區可能利用的技術概要
    • WLCSP
    • FO-WLP
    • 晶圓植球(金,錫和銅)
    • 3D WLCSP
    • 3D IC
    • 內插器
    • 晶圓級光學(WLO)
  • 技術詳細內容
    • TSV
    • RDL和鈍化處理
    • 凸塊(晶圓植球)技術(電鍍,印刷等)
    • 堆疊技術(W2W,C2W)
  • 生產力相關資訊(300mm晶圓換算的年生產數量)
    • 晶圓的直徑(4英吋,6英吋,8英吋,12英吋,面板)
    • 晶圓的類型(Si,GaAs等)
    • 各平台的生產能力
    • 各凸塊技術的生產能力
    • 其他的生產能力:薄晶圓處理,晶圓連接
  • 經營模式和地區
    • 不同商業模式的分類
    • 不同地區的分類

該資料庫涵蓋的企業(主要的150家企業與250家晶圓製造工廠所在地)

  • 晶圓凸塊(晶圓植球)加工的受託企業
    • NEPES
    • ChipBond
    • FCI
  • 半導體構造檢驗受託企業
    • ASE
    • SPIL
    • STATSChipPac
  • 晶圓包裝加工的受託企業
    • Xintec
    • China WLCSP
    • Nemotek
    • OptoPac
  • 研究開發企業與試驗品生產線
    • CEA LETI
    • IMEC
    • RTI
  • MEMS產品的垂直整合設備製造廠商(IDM)/晶圓代工廠—
    • Silex
    • Dalsa
    • APM
  • TSV晶圓代工廠—
    • ALLVia
    • EPWorks
  • IC製造廠商(IDM)
    • Texas Instruments
    • STMicroelectronics
    • Samsung
  • CMOS晶圓代工廠—
    • TSMC
    • Globalfoundries
    • UMC

目錄

Abstract

Worldwide overview of the activity and installed capacities for packaging at the wafer-scale in 250+ different ‘Mid-end’ factories

DESCRIPTION

There is an unprecedented growing demand to meet the needs for Wafer Level Packaging. If flip-chip wafer bumping and WLSCP platforms are well established today, new technologies are also emerging like TSV for 3D WLP, 2.5D interposers, 3DIC or FO WLP, requiring new capabilities and additional capacities for packaging at the wafer-scale.

Key objectives of the database

This database presents the exhaustive list of players and the different locations that are involved in Wafer Level Packaging in general. This unique tool provides a global overview of capabilities (TSV, RDL, wafer bumping, etc...) and capacities.

  • An exclusive tool for equipment & material suppliers to develop worldwide their business and for Fabless and Fab-light semiconductor players to identify new sourcing opportunities
  • The tool enables you to analyze WLP technologies distribution by players, technology type, country, business model, investment & growth evaluation
  • Already 20+ graphs are included for a better understanding of the global trends
  • Small R&D and prototype lines are also listed

A database dedicated to your needs

Our database references more than 250 fab locations worldwide with technical information related to Wafer Level Packaging technologies (bumping, RDL, passivation, TSV) or “mid-end” capabilities

2010 Worldwide wafer bumping* capacity Breakdown by business model
(in 300mm eq wst/y)

*including: stud and plated Au, printed and plated solder, Cu pillar, ball drop, C4/C4NP

The tool provides an exhaustive list of players (IDM, OSAT, packaging house, bumping house, etc...).

It will enable you to:

  • Search by WLP technology capacities and capabilities
  • Review the profile and repartition of one given technology among the different industry players
  • Study players manufacturing / outsourcing strategy and supply chain

Identify and source new WLP service suppliers for the wafer -scale packaging of your products

Companies listed in the database

Our database references over 150 companies (IDMs, OSAT, foundries, MEMS, R&D Lab, etc...) and their 250 + wafer fab locations worldwide.

Wafer bumping houses:

  • NEPES
  • ChipBond
  • FCI

OSAT:

  • ASE
  • SPIL
  • STATSChipPac

Wafer packaging houses:

  • Xintec
  • China WLCSP
  • Nemotek
  • OptoPac

R&D Lab & prototype lines:

  • CEA LETI
  • IMEC
  • RTI

MEMS IDM/foundries:

  • Silex
  • Dalsa
  • APM

TSV foundries:

  • ALLVia
  • EPWorks

IC manufacturers (IDM):

  • Texas Instruments
  • STMicroelectronics
  • Samsung

CMOS foundries:

  • TSMC
  • Globalfoundries
  • UMC

BENEFITS

Reason to buy this database?

  • Equipment & Material suppliers
    • Identify key WLP players and locations worldwide with detailed quantitative and qualitative information about their installed capacities for wafer-level-packaging in the Mid-end
    • Screen market penetration status of one particular technology (e.g. TSV, copper pillar bumping, gold bumping, RDL, etc...) worldwide and understand who are their key users
  • IDM, fabless and fab-light players
    • Oversee supplier subcontractors capabilities and capacities per WLP technology.
    • Benchmark several different subcontractors
    • Identify new sourcing strategies
  • Small IDM or niche market IDM
    • Identify prototype lines for WLP worldwide
    • Identify small fabs capable of handling very specific wafer-level-packaging schemes (e.g. with exotic materials, 4" small wafer diameter, etc...)
  • OSAT, foundries, packaging and bumping house
    • Get an exhaustive list of competitors or potential partners in your field
    • Evaluate global WLP capacities by technologies, regions, business models
    • Information about key customers' internal installed capacities in the Mid-end

BIO

Christophe Zinck, PhD joined Yole Devéloppement after several positions in the wafer fab and packaging environment of CE A-Leti, ST and TriQuint Semiconductor, where he has developed WLP & flip-chip technology for S AW duplexers. He is now project manager for Advanced Packaging, WLP & 3D system Integration and RF devices. He authored and co-authored 15+ publications and is currently holding 3 US patents.

ABOUT YOLE DÉVELOPPEMENT

Beginning in 1998 with Yole Devéloppement, we have grown to become a group of companies providing market research, technology analysis, strategy consulting, media in addition to finance services. With a solid focus on emerging applications using silicon and/or micro manufacturing Yole Devéloppement group has expanded to include more than 40 associates worldwide covering MEMS and microfluidics, Advanced Packaging, Compound Semiconductors, Power Electronics, LED, and Photovoltaic. The group supports companies, investors and R&D organizations worldwide to help them understand markets and follow technology trends to develop their business.

Table of Contents

This database lists the following information:

  • General information:
    • Fab location
    • Fab function (Front-end, Back-end, etc...)
    • Main customer, JV, partnership
  • Technology platforms available by location:
    • WLCSP
    • FO-WLP
    • Flip-chip wafer bumping (Au, solder, Cu, etc...)
    • 3D-WLCSP
    • 3DIC
    • Interposers
    • Wafer Level Optic
  • Details about technology:
    • TSV
    • RDL and passivation
    • Bumping technologies (plating, printing, ...)
    • Stacking technologies (W2W, C2W)
    • Capacities information (in 300mm eq wf/year):
    • Wafer diameter (4"/6"/8"/12"/panel)
    • Wafer type (Si, GaAs, etc...)
    • Capacities by platforms
    • Capacities by bumping technologies
    • Others capabilities: thin wafer handling, wafer bonding, ...
  • Business model & region:
    • Breakdown by business models
    • Breakdown by regions
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